Facoltà di Ingegneria - Guida degli insegnamenti (Syllabus)

Program

Elementi di Elettronica (INF)
Elements of Electronics
Paolo Crippa

Seat Ingegneria
A.A. 2016/2017
Credits 9
Hours 72
Period I
Language ENG

Prerequisites
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Learning outcomes
KNOWLEDGE AND UNDERSTANDING:
The course objective is to provide students with the basic concepts of logic circuits and analog and digital electronics, to provide the skills needed to analyze simple analog and digital circuits, to provide basic skills for the design of digital systems.
CAPACITY TO APPLY KNOWLEDGE AND UNDERSTANDING:
The student must achieve the analysis and design skills in logical networks, and basic analog and digital electronic circuits. This ability will lead to a series of professional skills, such as: 1. the ability to appropriately choose both analog and digital discrete electronic components; 2. optimize combinational and sequential networks; 3. simulate elementary analog and digital circuits and discuss the results, 4. design elementary digital circuits
TRANSVERSAL SKILLS:
The student through the solution and the design of elementary analog and digital circuits will be able to integrate the skills achieved in this course and in the other ones to refine and develop his competence in basic electronics. The student by teamworking will acquire critical dialogue, organization, and design-oriented collaboration skills, and in general, he will improve his autonomous discernment as well as his communication ability.

Program
Contents (lectures, 72 hours) - Number systems and codes. - Binary functions: AND, OR, NOT, NAND, NOR, XOR, XNOR; full-adder. - Boolean algebra. - Combinatorial networks: logic circuits, algebraic representation, sum of products, product of sums, minterms, maxterms, canonical sum and product, synthesis of combinatorial circuits. Programmable Logic Array (PLA); Karnaugh maps. The Quine-McCluskey algorithm. NAND, NOR implementations. - Integrated circuits, logic families. Design of combinatorial circuits: analysis and synthesis. Code converters. Coders and decoders. Multiplexers and demultiplexers. Implementation of combinatorial circuits by using decoders and multiplexers. Half-adder and full-adder, carry lookahead adder. Multipliers. - Sequential networks. SR, S'R' and D latch. Flip-flops: SR, JK, D, T. State machines, Moore and Mealy models. Analysis and design of sequential circuits. Registers and shift-registers. Counters. - Analog and digital signal representation. Linear and non-linear devices. Non-linear circuit analysis. Ideal amplifiers, voltage and current gain, input and output impedance, frequency response. - The operational amplifier. The ideal Op-Amp. Circuits with Op-Amps. - Fundamentals of solid-state electronics. The p-n junction. - The diode: DC characteristic, Shockley model, piecewise linear models. Circuits with diodes. Diode logic. - The MOS transistor (MOSFET): n- and p-channel MOSFET, behavior, model, I-V characteristics. - The bipolar junction transistor (BJT): behavior, model, I-V characteristics. - Single transistor amplifiers with BJT and with MOSFET: biasing circuits, basic configurations. - Analysis of electronic circuits with diodes, MOSFETs, and BJTs: linearization, DC and AC behavior. - Inverter: characteristics and noise margin. DC analysis, power consumption, transient analysis, rise and fall time, propagation delay. The NMOS inverter with resistive load and with active load. The CMOS inverter. - NMOS, pseudo-NMOS and CMOS random logic. PLA.

Development of the examination
LEARNING EVALUATION METHODS
The student learning evaluation is based on two tests: - a written test consisting in the solution of exercises related to topics covered in the course. It takes two hours; - an oral test consisting in the discussion of one or more topics covered in the course. When necessary, the questions, whose answers also require short calculations or simple circuit drawings, will be carried out in writing during the oral test. The written test is preliminary to the oral test, to access to which the student must have obtained at least 16/30 in the written test. The oral test should be performed in the same call of the written test. In case of failure of the oral test, the student must also repeat the written test.

LEARNING EVALUATION CRITERIA
In the written test the student must demonstrate that he has well learned the basic concepts and tools of logical networks and that he has acquired the ability to analyze and solve simple digital and analog electronic circuits. In the oral test the student must demonstrate to have an overall knowledge of basic analog and digital electronics and the ability to design combinational and sequential logic circuits.

LEARNING MEASUREMENT CRITERIA
The written test is graded according to a scale ranging from 0/30 to 30/30. The mark is obtained by summing the marks obtained by solving the proposed exercises weighted according to their typology and complexity. The oral test is graded according to a scale ranging from 0/30 to 30/30.

FINAL MARK ALLOCATION CRITERIA
The final mark, on a 30-point scale, is given by the mark obtained in the oral test that takes into account the results obtained in the written test. The highest mark is achieved by demonstrating a thorough knowledge of the course contents during the two tests. The cum laude will be awarded to the students who, having successfully passed both tests, have also demonstrated a particular skill in performing the oral test and the written exercises.